IRS2336x(D) Family
Figure 10: Illustration of shoot-through protection circuitry
IRS2336(D)
IRS23364D
HIN
0
0
1
1
LIN
0
1
0
1
HO
0
1
0
0
LO
0
0
1
0
HIN
0
0
1
1
LIN
0
1
0
1
HO
0
0
1
0
LO
0
1
0
0
Table 1: Input/output truth table for IRS2336D and IRS23364D
Enable Input
The IRS2336xD family of HVICs is equipped with an enable input pin that is used to shutdown or enable the HVIC.
When the EN pin is in the high state the HVIC is able to operate normally (assuming no other fault conditions). When
a condition occurs that should shutdown the HVIC, the EN pin should see a low logic state. The enable circuitry of
the IRS2336xD features an input filter; the minimum input duration is specified by t FILTER,EN . Please refer to the EN
pin parameters V EN,TH+ , V EN,TH- , and I EN for the details of its use. Table 2 gives a summary of this pin’s functionality
and Figure 11 illustrates the outputs’ response to a shutdown command.
EN
V EN,TH-
Enable Input
t EN
Enable input high
Outputs enabled
*
Enable input low
Outputs disabled
HOx
90%
(or LOx)
Table 2: Enable functionality truth table
(*assumes no other fault condition)
www.irf.com
23
Figure 11: Output enable timing waveform
? 2009 International Rectifier
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